Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Reexamination Certificate
2005-03-15
2005-03-15
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
C326S095000, C326S096000, C326S093000
Reexamination Certificate
active
06867619
ABSTRACT:
A shift register includes at least one stage circuit that has at least three voltage control switches, a storage element, and a first clock signal, a second clock signal and a third clock signal to control various switches. Input signals are stored in the capacitor and sequentially transferred to the next stage. During transferring to the next stage, pixel switches of one row on the panel display are activated to receive information delivered from the data end for displaying on the pixels. The clock signals have the characteristics that the first clock signal, second clock signal and third clock signal are not at the same certain potential concurrently to prevent the switches of each stage (the second and third switches) from forming a DC path and burning out.
REFERENCES:
patent: 3610951 (1971-10-01), Howland
patent: 3731114 (1973-05-01), Gehweiler
patent: 3937984 (1976-02-01), Fry
Chen Yen-Hua
Chien Chih-Chung
Hong Rui-Guo
Lo Shin-Tai
Birch & Stewart Kolasch & Birch, LLP
Tran Anh Q.
Wintek Corporation
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