Shift redundancy circuit, method for controlling shift...

Details Shift redundancy circuit, method for controlling shift... Shift redundancy circuit, method for controlling shift...

2007-11-27

2007-11-27

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S189120

Reexamination Certificate

active

11282723

ABSTRACT:
A shift redundancy circuit for enabling switching operation of memory blocks to be executed at a high speed and for reducing current consumption relating to the switching operation. A shift control circuit includes a first shift control circuit for generating a first shift signal corresponding to a first deficiency address of a memory block and a second shift control circuit for generating a second shift signal corresponding to a second deficiency address of a memory block. When the memory blocks are switched, a shift signal controlling the switching of selection line switches are selected from the first shift signal whose state is determined in advance, the second shift signal whose state is determined in advance, and a low potential power supply.

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