Sharing elements in multiple data-rate I/O

Details Sharing elements in multiple data-rate I/O Sharing elements in multiple data-rate I/O

2006-06-27

2009-12-08

Lee, Thomas (Department: 2115)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C326S040000, C326S041000, C326S046000

Reexamination Certificate

active

07631211

ABSTRACT:
Circuits, methods, and apparatus are directed to sharing input and output functionality. A timing circuit usable for input and output functionality may be combined with another timing circuit to provide additional input/output functionality or to reduce the number of circuit elements for input/output functionality. For example, two timing circuits may be used to provide double data-rate input while still providing output functionality, or vice versa. Two timing circuits may also provide output that is timed and gated with an output enable signal.

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