Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2005-01-11
2005-01-11
Le, Don (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S115000, C326S126000
Reexamination Certificate
active
06842037
ABSTRACT:
Systems and methods are disclosed for sharing a transmission line among different interface technologies. For example, in accordance with an embodiment of the present invention, two different high-speed differential interface technologies (CML and LVDS) share a communication channel.
REFERENCES:
patent: 6437599 (2002-08-01), Groen
patent: 6438159 (2002-08-01), Uber et al.
patent: 6462852 (2002-10-01), Paschal et al.
patent: 6490325 (2002-12-01), Fiedler et al.
patent: 6507225 (2003-01-01), Martin et al.
patent: 6556628 (2003-04-01), Poulton et al.
patent: 6563322 (2003-05-01), Hannan
U.S. Patent Application Publication No. US 2003/0085736 A1 entitled “Interchangeable CML/VDS Data Transmission Circuit”, filed on Jan. 29, 2002.
Lattice Semiconductor Corporation
Le Don
MacPherson Kwok & Chen & Heid LLP
Michelson Greg J.
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