Shared terminal memory interface

Static information storage and retrieval – Read/write circuit – Plural use of terminal

Reexamination Certificate

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Details

C365S189011, C365S189020, C365S230020, C711S149000, C711S104000, C370S280000, C370S294000, C370S314000, C370S321000

Reexamination Certificate

active

07405980

ABSTRACT:
A memory architecture for a disk drive system in which Synchronous Random Access Memory (SRAM) and Dynamic Random Access Memory (DRAM) functions are provided on separate integrated circuits, and an interface protocol for transmitting information between these two memory components are provided to improve performance of the system, as well as reduce pin count and cost. An integrated circuit memory includes a random-access memory. The random-access memory includes a first terminal for receiving selection information. The random-access memory includes a second terminal for selectively (i) receiving a command, or (ii) receiving or transmitting data in accordance with the selection information received by the first terminal.

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