Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1989-05-23
1991-01-01
Moffitt, James W.
Static information storage and retrieval
Read/write circuit
Data refresh
365205, 365210, G11C 700
Patent
active
049823701
ABSTRACT:
In a dynamic random access semiconductor memory device comprising a sense amplifier and two pairs of bit lines sharing the sense amplifiers, each of the bit lines having a plurality of memory cells connected thereto, when a memory cell connected to one of the bit-line pairs is selected, the memory cells connected to the other bit-line pair are not connected to the sense amplifier, and, during a refresh cycle for rewriting data into a selected memory cell connected to a bit line of one of the bit-line pairs, the bit lines of the other bit-line pair are disconnected from the sense amplifier.
REFERENCES:
patent: 4351034 (1982-09-01), Eaton, Jr. et al.
patent: 4578782 (1986-03-01), Kraft et al.
patent: 4598387 (1986-07-01), Chuang et al.
patent: 4606010 (1986-08-01), Saito
patent: 4628488 (1986-12-01), Saku et al.
patent: 4710901 (1987-12-01), Kumanoya et al.
1984 IEEE International Solid-State Circuits Conference, Feb. 24, 1984, pp. 278-279.
Eaton et al., "Circuit Advances Propel 64-K RAM Across the 100-ns Barrier", Electronics, Mar. 24, 1982, at 132.
Kobayashi Toshifumi
Mashiko Koichiro
Matsumoto Noriaki
Mitsubishi Denki & Kabushiki Kaisha
Moffitt James W.
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