Shared receive queues

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

Reexamination Certificate

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Details

C711S130000, C709S215000

Reexamination Certificate

active

07089378

ABSTRACT:
The disclosed embodiments relate to a queuing mechanism that may comprise a shared receive queue having a plurality of buffers. The queuing mechanism may also comprise a plurality of queue pairs, each of the plurality of queue pairs having a receive queue that comprises at least one of the plurality of buffers.

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