Shared interrupt controller for a multi-threaded processor

Details Shared interrupt controller for a multi-threaded processor Shared interrupt controller for a multi-threaded processor

2011-07-19

2011-07-19

Alrobaye, Idriss N (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Branching

C710S260000, C710S261000

Reexamination Certificate

active

07984281

ABSTRACT:
A multi-threaded processor is disclosed that includes a sequencer adapted to provide instructions associated with one or more threads of a multi-threaded processor. The sequencer includes an interrupt controller adapted to receive one or more interrupts and to selectively allow a first thread of the one or more threads to service at least one interrupt. The interrupt controller includes logic to preclude a second thread of the one or more threads from responding to the at least one interrupt.

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