Shared embedded trace macrocell

Details Shared embedded trace macrocell Shared embedded trace macrocell

2006-02-28

2006-02-28

Beausoliel, Robert (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S030000, C714S031000

Reexamination Certificate

active

07007201

ABSTRACT:
An apparatus generally comprising a plurality of processors, a trace circuit, and a connector circuit. The trace circuit may be configured to present information at a port for debugging software in a selected processor of the processors. The connector circuit may be configured to (i) couple the trace circuit to the selected processor in response to a select signal and (ii) transfer the information from the selected processor to the trace circuit while the selected processor is executing the software.

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“Embedded Trace Macrocell Specification”, pp. 1-1 to 7-18 (plus appendix and glossary).

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