Shared dram I/O databus for high speed operation

Static information storage and retrieval – Addressing – Multiple port access

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

36518905, G11C 800

Patent

active

056803656

ABSTRACT:
A dual-port semiconductor memory device is formed on a chip and includes a plurality of memory cells arranged in rows and columns, and first and second input/output ports for inputting/outputting data to/from the memory device. Each port includes a data terminal, an input/output circuit for inputting/outputting data from/to the data terminal, a storage buffer connected to the input/output circuit for storing/supplying data from/to the input/output means, and read/write amplifiers connected to the storage buffer for reading data from the memory cell array to the storage buffer and writing data from the storage buffer to the memory cell array. A shared global input/output bus is connected to the read/write amplifiers of the first and second ports, and to the memory cell array.

REFERENCES:
patent: 4700328 (1987-10-01), Burghard
patent: 4779145 (1988-10-01), Remington et al.
patent: 5185724 (1993-02-01), Toda
patent: 5233558 (1993-08-01), Fuji et al.
patent: 5235552 (1993-08-01), Nakajima et al.
patent: 5260892 (1993-11-01), Testa
patent: 5265212 (1993-11-01), Bruce, II
patent: 5265218 (1993-11-01), Testa et al.
patent: 5272664 (1993-12-01), Alexander et al.
patent: 5289426 (1994-02-01), Namimoto et al.
patent: 5327390 (1994-07-01), Takasugi
patent: 5329489 (1994-07-01), Diefendorff
patent: 5365488 (1994-11-01), Matsushita
patent: 5365489 (1994-11-01), Jeong
patent: 5367488 (1994-11-01), An
patent: 5406527 (1995-04-01), Honma
patent: 5416743 (1995-05-01), Allan et al.
patent: 5418737 (1995-05-01), Tran
patent: 5430686 (1995-07-01), Tokami
patent: 5446691 (1995-08-01), North et al.
patent: 5548559 (1996-08-01), Mochizuki et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Shared dram I/O databus for high speed operation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Shared dram I/O databus for high speed operation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Shared dram I/O databus for high speed operation will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1012459

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.