Shared buffer having hardware-controlled buffer regions

Details Shared buffer having hardware-controlled buffer regions Shared buffer having hardware-controlled buffer regions

2011-01-25

2011-01-25

Thai, Tuan V. (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S100000, C711S154000

Reexamination Certificate

active

07877548

ABSTRACT:
Buffer memories having hardware controlled buffer space regions in which the hardware controls the dimensions of the various buffer space regions to meet the demands of a particular system. The hardware monitors the usage of the buffer data regions over time and subsequently and automatically adjusts the dimensions of the buffer space regions based on the utilization of those buffer regions.

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