Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-04-10
2007-04-10
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S786000
Reexamination Certificate
active
10409634
ABSTRACT:
In the MSN encoded form, the symbols of each block of the present invention define a running digital sum (RDS) value, defined as RDS([a0a1. . . aN−1])=−Σi(−1)aiwhere the symbols aibelong to the set {0, 1} and the sum extends for values of i from 0 to N−1. An encoder is configured to satisfy at least one of the following characteristics: a) blocks of symbols with a given length (L) are used for encoding, wherein RDS=RDS0+4.K, where K is an integer, RDS is the said running digital sum, RDS0is defined as zero for even values of the said length (L), and one for odd values of said length (L), and b) blocks of symbols with a given length (L) are used for MSN coding and encoding is effected by selecting encoded blocks such that the set of running digital sum (RDS) values is the set with the minimum number of elements that satisfy the required rate value, defined as the ratio between the length of the input blocks and the length of the output blocks. A decoder with a simplified trellis structure is used for decoding (as in decoding a digital signal read from media on which the signal in question has been recorded via a vertical or perpendicular magnetic recording technique, for example).
REFERENCES:
patent: 5280489 (1994-01-01), Fredrickson et al.
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patent: 6347390 (2002-02-01), Ino
patent: 6385255 (2002-05-01), McLaughlin et al.
Dati Angelo
Giovenzana Davide
Rossi Augusto
Abraham Esaw
De'cady Albert
STMicroeletronics S.R.L.
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