Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2002-05-24
2002-12-31
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
Reexamination Certificate
active
06500728
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to semiconductor fabrication and more specifically to fabrication of shallow trench isolation (STI) structures.
BACKGROUND OF THE INVENTION
After formation of conventional shallow trench isolation structures (STIs), if the subsequent contact photolithography process is misaligned to the OD (active region) layer, the contact etch may attack the STI profile and induce leakage issues.
U.S. Pat. No. 6,297,128 B1 to Kim et al. describes an STI trench filled with multiple layers including high density plasma (HDP) oxide.
U.S. Pat. No. 6,100,160 to Hames describes an STI process using HDP oxide and a nitration step.
U.S. Pat. No. 5,930,645 to Lyons et al. describes an STI process using HDP oxide.
U.S. Pat. No. 6,306,725 to Nag et al. describes an STI trench filled with two layers including HDP oxide.
SUMMARY OF THE INVENTION
Accordingly, it is an object of one or more embodiments of the present invention to provide an STI structure that minimizes the deleterious effects of unlanded contact windows.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a structure having an STI opening formed therein is provided. An HDP silicon oxide layer portion is formed within the STI opening, partially filling the STI opening. A planarized HDP silicon-rich-oxide cap layer is formed upon the HDP silicon oxide layer portion, filling the STI opening to form the dual-oxide STI, whereby any unlanded contact window formed through an overlying interlevel dielectric layer exposing a portion of the dual-oxide STI only exposes a portion of the HDP silicon-rich-oxide cap layer.
REFERENCES:
patent: 5731242 (1998-03-01), Parat et al.
patent: 5930645 (1999-07-01), Lyons et al.
patent: 6100160 (2000-08-01), Hames
patent: 6265302 (2001-07-01), Lim et al.
patent: 6297126 (2001-10-01), Lim et al.
patent: 6297128 (2001-10-01), Kim et al.
patent: 6306725 (2001-10-01), Nag et al.
patent: 6335249 (2002-01-01), Thei et al.
patent: 6342428 (2002-01-01), Zheng et al.
patent: 6350661 (2002-02-01), Lim et al.
patent: 6448149 (2002-09-01), Lee et al.
patent: 2001/0031540 (2001-10-01), Lim et al.
patent: 2002/0004285 (2002-01-01), Wu
Ackerman Stephen B.
Isaac Stanetta
Niebling John F.
Saile George O.
Stanton Stephen G.
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