Shallow trench isolation formation with reduced polish stop thic

Details Shallow trench isolation formation with reduced polish stop thic Shallow trench isolation formation with reduced polish stop thic

1997-12-18

1999-07-27

Brown, Peter Toby

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438425, 438426, H01L 2176

Patent

active

059306459

ABSTRACT:
An insulated trench isolation structure is formed in a semiconductor substrate using a thin amorphous silicon or polysilicon polish stop layer by adding a reflectance compensation layer on the polish stop layer. As a result, the topological step between the main surface of the substrate and the uppermost surface of the trench fill is reduced, thereby facilitating the application and enhancing the accuracy of photolithographic techniques in forming features with minimal dimensions.

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