Shallow trench isolation formation with no polish stop

Details Shallow trench isolation formation with no polish stop Shallow trench isolation formation with no polish stop

1997-12-18

2000-07-18

Utech, Benjamin L.

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

438697, 438700, 438691, 438692, H01L 21461

Patent

active

060907126

ABSTRACT:
An insulated trench isolation structure is formed in a semiconductor substrate omitting a barrier nitride polish stop layer while avoiding substrate damage, thereby simplifying trench formation and improving planarity. After trench fill, polishing is conducted to effect substantial planarization without exposing the substrate surface, thereby avoiding substrate damage. Etching is then conducted to expose the substrate surface. The omission of the barrier nitride polish stop avoids generation of a topographical step at the substrate/trench fill interface, thereby enhancing the accuracy of subsequent photolithographic techniques in forming features with minimal dimensions.

REFERENCES:
patent: 5494857 (1996-02-01), Cooperman et al.
patent: 5712185 (1998-01-01), Tsai et al.
patent: 5872043 (1999-02-01), Chen
patent: 5895255 (1999-04-01), Tsuchiaki

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