Shallow trench isolation dummy pattern and layout method...

Details Shallow trench isolation dummy pattern and layout method... Shallow trench isolation dummy pattern and layout method...

2008-06-17

2008-06-17

Lewis, Monica (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S510000

Reexamination Certificate

active

07388263

ABSTRACT:
A dummy cell pattern for shallow trench isolation (STI). Active and shallow trench isolation areas are bounded by a circumference. An active area pattern completely overlaps the active area and a first polysilicon pattern in the shallow trench isolation area is outside the active area pattern. Layout methods using the same are also disclosed.

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patent: 6010939 (2000-01-01), Bothra
patent: 6020616 (2000-02-01), Bothra et al.
patent: 6327695 (2001-12-01), Bothra et al.
patent: 6335560 (2002-01-01), Takeuchi
patent: 6693315 (2004-02-01), Kuroda et al.
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