Shallow source MOSFET

Details Shallow source MOSFET Shallow source MOSFET

2011-01-25

2011-01-25

Warren, Matthew E (Department: 2815)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S259000, C438S270000, C438S585000, C438S595000, C257S330000, C257SE29257, C257SE21626, C257SE21640

Reexamination Certificate

active

07875541

ABSTRACT:
Fabricating a semiconductor device includes forming a hard mask on a substrate having a top substrate surface, forming a trench in the substrate through the hard mask, depositing gate material in the trench, where the amount of gate material deposited in the trench extends beyond the top substrate surface, and removing the hard mask to leave a gate having a gate top surface that extends substantially above the top substrate surface at least in center region of the trench opening, the gate having a vertical edge that includes an extended portion, the extended portion extending above the trench opening and being substantially aligned with the trench wall. It further includes implanting a body, implanting a plurality of source regions embedded in the body, forming a plurality of spacers that insulate the source regions from the gate, the plurality of spacers being situated immediately adjacent to the gate and immediately adjacent to respective ones of the plurality of source regions, wherein the plurality of spacers do not substantially extend into the trench and do not substantially extend over the trench, disposing a dielectric layer over the source, the spacers, the gate, and at least a portion of the body, forming a contact opening, and disposing metal to form a contact with the body at the contact opening.

REFERENCES:
patent: 6858896 (2005-02-01), Inagawa et al.
patent: 6982202 (2006-01-01), Hofmann et al.
patent: 2004/0195608 (2004-10-01), Kim et al.

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