Shadow memory for a SRAM and method

Details Shadow memory for a SRAM and method Shadow memory for a SRAM and method

1998-08-31

2000-03-07

Nguyen, Viet Q.

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 36518905, 365205, 36518901, G11C 1100

Patent

active

060348860

ABSTRACT:
A method of operating a memory cell includes detecting a first power supply anomaly or condition. When the first power supply condition occurs, memory cell access to bit lines is disabled, a series of shadow memory access FETs within the memory cells are enabled and data from the memory cells are coupled to memory FETs within the memory cells to store data corresponding to the data from the memory cells in the memory FETs. The memory FETs include nanocrystals of semiconductor material in gate dielectrics of the FETs. Electrons are stored in the nanocrystals of semiconductor material to represent the data stored in the memory cell. When a second power supply condition is detected, the data stored in the memory FETs are written back to the memory cells.

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