Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-09-05
2006-09-05
Bragdon, Reginald G. (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S144000, C345S557000
Reexamination Certificate
active
07103720
ABSTRACT:
Methods and systems for caching graphics data using dedicated level one caches and a shared level two cache are described. Furthermore, each method includes a protocol for maintaining coherency between the level one caches and between the level one caches and the level two cache. The level one caches may store different versions of the graphics data, permitting simultaneous processing of execution threads, each thread accessing a different version of the graphics data.
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Lindholm John Erik
Moy Simon S.
Bragdon Reginald G.
Flournoy Horace
NVIDIA Corporation
Patterson & Sheridan L.L.P.
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