Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-09-19
2006-09-19
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S128000, C711S130000, C711S150000, C711S153000, C711S170000, C711S173000
Reexamination Certificate
active
07111124
ABSTRACT:
A method, apparatus, and signal-bearing medium for improving the performance of a cache when request streams with different spatial and/or temporal properties access the cache. A set in the cache is partitioned into subsets with different request streams using different subsets within the cache. In this way, interference between the different request streams is reduced.
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Iyer Ravishankar R.
Vogt Pete D.
Intel Corporation
Peikari B. James
Schwegman Lundberg Woessner & Kluth P.A.
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