Set-associative cache memory utilizing a single bank of physical

Details Set-associative cache memory utilizing a single bank of physical Set-associative cache memory utilizing a single bank of physical

1996-10-17

1999-05-18

Bowler, Alyssa H.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711128, 711130, 711153, 711173, G06F12/08

Patent

active

059059974

ABSTRACT:
Multiple banks associated with a multiple set associative cache are stored in a single chip, reducing the number of SRAMs required. Certain status information for the second level (L2) cache is stored with the status information of the first level cache. This enhances the speed of operations by avoiding a status look-up and modification in the L2 cache during a write operation. In addition, the L2 cache tag address and status bits are stored in a portion of one bank of the L2 data RAMs, further reducing the number of SRAMs required. Finally, the present invention also provides local read-write storage for use by the processor by reserving a number of L2 cache lines.

REFERENCES:
patent: 4190885 (1980-02-01), Joyce et al.
patent: 4464717 (1984-08-01), Keeley et al.
patent: 4622631 (1986-11-01), Frank et al.
patent: 4667288 (1987-05-01), Keeley et al.
patent: 4736293 (1988-04-01), Patrick
patent: 5119290 (1992-06-01), Loo et al.
patent: 5185878 (1993-02-01), Baror et al.
patent: 5195089 (1993-03-01), Sindhu et al.
patent: 5210843 (1993-05-01), Ayers
patent: 5226009 (1993-07-01), Arimoto
patent: 5226126 (1993-07-01), McFarland et al.
patent: 5253353 (1993-10-01), Mogul
patent: 5283880 (1994-02-01), Marcias-Garza
patent: 5293603 (1994-03-01), MacWilliams et al.
patent: 5307477 (1994-04-01), Taylor et al.
patent: 5345576 (1994-09-01), Lee et al.
patent: 5355467 (1994-10-01), MacWilliams et al.
patent: 5418922 (1995-05-01), Liu
patent: 5423014 (1995-06-01), Hinton et al.
patent: 5440707 (1995-08-01), Hayes et al.
patent: 5465342 (1995-11-01), Walsh
Hamacher et al., Computer Organization, 1990, pp. 332-350.

Affiliated with

Also associated with

Rating

Set-associative cache memory utilizing a single bank of physical does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Set-associative cache memory utilizing a single bank of physical, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Set-associative cache memory utilizing a single bank of physical will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1769271