Servo address mark detection compensating circuit

Details Servo address mark detection compensating circuit Servo address mark detection compensating circuit

1995-04-18

1998-10-20

Tran, Thang V.

Dynamic magnetic information storage or retrieval

General processing of a digital signal

Data clocking

49 7708, 49 7814, G11B 509, G11B 5596

Patent

active

058255680

ABSTRACT:
A servo address mark (SAM) detection compensating circuit in a disk recording apparatus includes a servo address mark (SAM) detector that receives an end of sector (ENDS) signal indicating that the end of a prescribed recording region has been reached, generates a synchronizing signal (SYNC) when the servo address mark (SAM) is detected during a window enable interval, and generates an error detection signal when the servo address mark (SAM) is not detected during the window enable interval. A first storage device generates a first count value representative of a first time interval extending from when detection of the servo address mark (SAM) is expected to when a desired recording region is to be sampled, and a second storage device generates a second count value in response to the error detection signal. The second count value represents a second time interval extending from when detection of the servo address mark (SAM) is expected to when the window enable interval ends. A counter performs a counting operation from a starting point determined in dependence upon whether or not the servo address mark (SAM) is detected during the window enable interval, and maintains a current count value. A comparator compares the first count value stored in the first storage device with the current count value of the counter, and generates a sampling enable signal to accurately detect a desired recording region when the current count value and the first count value are equal.

REFERENCES:
patent: 4297737 (1981-10-01), Andresen et al.
patent: 4598327 (1986-07-01), Jen et al.
patent: 4737869 (1988-04-01), Sugaya et al.
patent: 4797757 (1989-01-01), Haitani
patent: 4910617 (1990-03-01), Brunnett et al.
patent: 5023732 (1991-06-01), Murakami et al.
patent: 5047877 (1991-09-01), Herting
patent: 5276564 (1994-01-01), Hessing et al.
patent: 5285327 (1994-02-01), Hetzler
patent: 5307216 (1994-04-01), Cook et al.
patent: 5315456 (1994-05-01), Hessing et al.
patent: 5317461 (1994-05-01), Okamoto et al.
patent: 5353175 (1994-10-01), Chiba
patent: 5384671 (1995-01-01), Fisher
patent: 5420730 (1995-05-01), Moon et al.

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