Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
2008-03-04
2008-03-04
Rinehart, Mark H. (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
C710S262000, C710S263000, C710S264000, C710S268000, C710S200000
Reexamination Certificate
active
07340547
ABSTRACT:
A driver program for a multiprocessor subsystem includes an interrupt servicing routine (ISR) and a deferred procedure call (DPC). The ISR, invoked in response to an interrupt, determines whether any of the co-processors in the multiprocessor subsystem generated an interrupt. If one of the co-processors generated an interrupt, the ISR schedules the DPC for execution and disables sending of further interrupts from all of the co-processors. The DPC services pending interrupts from any of co-processors, then re-enables sending of interrupts from the co-processors.
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Nvidia Corporation
Rinehart Mark H.
Townsend and Townsend / and Crew LLP
Zaman Faisal
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