Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
Reexamination Certificate
2008-12-23
2010-11-09
Thai, Tuan V. (Department: 2185)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
Addressing cache memories
C711S203000, C711S207000, C711S209000, C711S212000
Reexamination Certificate
active
07831760
ABSTRACT:
A method includes indexing a translation table stored in memory with a first index of a virtual address corresponding to a first memory region size by querying the translation table at first locations associated with the first index. Indexing the translation table with a second index of the virtual address corresponding to a second memory region size by querying the translation table at second locations associated with the second index. The translation table includes translations for mapping address tags of the virtual address to physical addresses. The first index is different than the second index, and the first memory region size is different than the second memory region size.
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O'Connor Dennis M.
Strazdus Stephen J.
Choe Yong
Marvell International Ltd.
Thai Tuan V.
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