Serial-write, random-access read, memory

Details Serial-write, random-access read, memory Serial-write, random-access read, memory

2005-01-07

2008-12-09

Sough, Hyung (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

Reexamination Certificate

active

07464229

ABSTRACT:
A serial-write, random-access read, memory addresses applications where the data in the memory may change more frequently than would make a PROM suitable, but that changes much less frequently than would require a RAM. This enables the circuit designer to optimize the memory for fast reads, and enables reads to be pipelined. One embodiment of the present invention provides a system that facilitates a serial-write, random-access read, memory. The system includes a plurality of memory cells and a serial access mechanism for writing data into the plurality of memory cells. The system also includes a parallel random-access mechanism for reading data from the plurality of memory cells.

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Ragnarok Pak-Kee Chan, “A Low Latency Asynchronous Shift Register”, 2004, IEEE Transactions on Circuits and Systems—II: Express Briefs, Val. 51, No. 5, pp. 217-221.

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