Serial-to-parallel conversion/parallel-to-serial conversion/...

Details Serial-to-parallel conversion/parallel-to-serial conversion/... Serial-to-parallel conversion/parallel-to-serial conversion/...

2006-07-25

2010-11-23

Tsai, Henry W (Department: 2184)

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral adapting

C717S128000

Reexamination Certificate

active

07840727

ABSTRACT:
Disclosed is a serial-to-parallel converter/parallel-to-serial converter/FIFO unified circuit which includes a register, a selector and a counter. The register receives serial input data and converts the serial data into parallel data based on frequency-divided multi-phase clock signals from a counter. The selector receives the parallel data from the register to select one of the data in accordance with a control signal. The counter generates the control signal for the selector so that plural items of data will be output serially from the selector in the sequence in which the plural items data have been serially supplied to the register.

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