Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Patent
1996-11-29
1999-08-24
Chan, Eddie P.
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
711 5, 711103, 711220, 326 39, 36523003, G06F 1202
Patent
active
059419741
ABSTRACT:
A method and apparatus for providing serially shifted data to a plurality of registers (51 through 56) begins by providing an enable signal (14). A first time portion of the enable signal (14) is either asserted or pulsed in order to provide a bank select control signal to a bank select circuit (74). After providing the bank select information, the enable (14) is activated in order to enable the storage of serial input data within a register (40). While data is being provided via a data input (16) to the register (40), a monitoring circuit (72) is recording the number of clocks (12) required to provide the entire sequence data into the register (40). A combination of the decoding information provided by the bank select circuit (74) and the monitoring circuit (72) allows one of a plurality of registers to be written with the data from register (40) even when the registers (51 through 56) are of a same size.
REFERENCES:
patent: 5157342 (1992-10-01), Atwood et al.
patent: 5530911 (1996-06-01), Lerner et al.
patent: 5588133 (1996-12-01), Yoshida et al.
patent: 5751988 (1998-05-01), Fujimura
Chan Eddie P.
Motorola Inc.
Nguyen Hiep T.
LandOfFree
Serial interface with register selection which uses clock counti does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Serial interface with register selection which uses clock counti, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Serial interface with register selection which uses clock counti will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-462562