Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2006-07-04
2006-07-04
Padmanabhan, Mano (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
Reexamination Certificate
active
07073022
ABSTRACT:
The present invention describes a method and system for interfacing a plurality of device controllers to an array of data storage devices by serial connection. The device controllers are coupled to a serial interface by a bus and the devices of the storage array are coupled to the serial interface by a serial connection. The serial interface receives controller signals through the bus and multiplexes the signals onto the serial connections of the storage array. Arbitration between the various device controllers seeking access to the storage array is resolved through bus protocol and through drive based reserve/release registers in the serial interface processor.
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El-Batal Mohamad H.
Fujie Yoshihiro
Liong Thomas Sing-Klat
Surugucchi Krishnakumar Rao
Chambliss Bahner & Stophel
Lynch David W.
Padmanabhan Mano
Rojas Midys
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