Serial implementation of assertion checking logic circuit

Details Serial implementation of assertion checking logic circuit Serial implementation of assertion checking logic circuit

2007-12-04

2007-12-04

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

11051774

ABSTRACT:
Serial assertion checking is realized in a System On a Chip (SoC) device by connecting scan chain output to a bit extractor configured within a functionally reconfigurable module that is part of the SoC, which extracts the bits necessary for the assertion checking. The extracted bits are applied to a finite state machine that implements the assertion checking.

REFERENCES:
patent: 7137086 (2006-11-01), Abramovici

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