Serial finite field multiplier

Details Serial finite field multiplier Serial finite field multiplier

2005-07-12

2005-07-12

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S046000, C708S492000, C708S625000

Reexamination Certificate

active

06917218

ABSTRACT:
The present invention relates to a finite field multiplier used for implementing an encrypting algorithm circuit, thereby minimizing power consumption and circuit area in implementing the finite field multiplier with a LFSR (Linear Feedback Shift Register) structure. The Finite field multiplier of the present invention is an operator performing a modular operation on the multiplication result of two data represented on a polynomial basis in a Galois Field into an irreducible polynomial. The LFSR structure is a serial finite field multiplication structure, and has a merit over an array structure and a hybrid structure in application to systems that are limited in size and power due to its simplicity of circuits and also its capability of being implemented in a small size.

REFERENCES:
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IEEE Transaction on Consumer Electronics, vol. 47, No. 3, Aug. 2001.

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