Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
2000-05-17
2004-11-09
Auve, Glenn A. (Department: 2189)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S049000, C710S008000
Reexamination Certificate
active
06816933
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to the field of communications. In particular, this invention is drawn to communication between a bus master and associated serial devices.
BACKGROUND OF THE INVENTION
Several communication techniques are available for enabling communication between a processor or a bus master and a plurality of serial devices coupled to the processor. Typically, the processor communicates with one or more serial devices sharing a common communication bus. In the event the processor needs to communicate information to a specific serial device, the processor must be able to distinguish the devices from each other. Various techniques are available to enable individual identification or selection of the serial devices.
For example, a separate select line may be used to enable each serial device. The serial devices are capable of responding or acting on information communicated when their respective select lines are asserted. One disadvantage of this technique is the imposed requirement for dedicated pins or exclusive signal lines on the processor to handle the device select signals. In particular, a separate select signal line is required for each serial device to be uniquely enabled.
Another technique uses jumpers, switches, or other hardware mechanisms associated with the serial devices to permit assignment of a unique identifier for each serial device. Each serial device only responds to commands with an accompanying identifier that matches that of the serial device as determined by the jumpers, switches or other hardware.
One disadvantage of this technique is that knowledge of other devices in the system is necessary to avoid duplicate device identifier assignments. Serial devices cannot be simply replaced or added into the system without first assigning a unique identifier. In addition, each device must have the ability to be configured for any one of a number of potential identifier assignments. For integrated circuit based serial devices additional packaging pins may be required to enable the serial device to support more than one potential identifier assignment.
SUMMARY OF THE INVENTION
In view of limitations of known systems and methods, methods and apparatus to enable unique identification of serial devices having a common bus for communication with a bus master are described.
One method includes the step of serially clocking a mask value through a plurality of serial devices until each serial device stores a corresponding portion of the mask value. The plurality of serial devices are provided with a command. Each serial device responds to the command only if enabled by the corresponding portion of the mask value.
Another method includes the step of initializing a plurality of serial devices to one of a first mode (i.e., normal mode) and a second mode (i.e., daisy chaining mode). If the plurality of devices are in the second mode, a mask value is serially clocked through the plurality of serial devices until each serial device stores a corresponding portion of the mask value. Wherein when provided with a command, every serial device responds to the command when in the first mode. Only serial devices enabled by the corresponding portion of the mask value respond to the command when in the second mode.
One serial device apparatus includes a memory coupled to receive a clock signal and a serial data in (SDI) signal carrying mask values, commands, and data, the memory providing a clocked SDI signal. A multiplexer is coupled to select one of the SDI signal and the clocked SDI signal as an SDI THRU signal in accordance with a mode control signal. A mode control provides the mode control signal. Responsive to the mode control signal the multiplexer selects the clocked SDI signal as the SDI THRU signal when the SDI signal carries the mask value, wherein the multiplexer selects the SDI signal when the SDI signal carries commands or data. When supporting multimodal operation, the mode control performs the above steps when the device is in a daisy chain mode and the mode control ensures the multiplexer selects only the SDI as the SDI THRU signal when the serial device is in a normal mode.
One apparatus includes a plurality of serial devices coupled to a bus master by a bus. The bus master clocks a mask value through the plurality of serial devices until each serial device stores a portion of the mask value. Each of the plurality of serial devices responds to a subsequent bus master issued command only if enabled by the corresponding portion of the mask value.
In various embodiments, the plurality of serial devices may be substantially identical. Alternatively, the plurality of serial devices may be heterogeneous. In one embodiment, at least one of the devices comprises a subscriber line interface circuit.
REFERENCES:
patent: 3784910 (1974-01-01), Sylvan
patent: 4683530 (1987-07-01), Quatse
patent: 5291490 (1994-03-01), Conti et al.
patent: 5577172 (1996-11-01), Vatland et al.
patent: 6148076 (2000-11-01), Eriksson et al.
Processor Intercommunication Register, IBM Technical Disclosure Bulletin, Sep. 1990, US, vol. No. 33, Issue No. 4, p. No. 309-311.
Auve Glenn A.
Davis William D.
Davis & Associates
Silicon Laboratories Inc.
Vu Trisha
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