Serial bus system for sending multiple frames of unique data

Details Serial bus system for sending multiple frames of unique data Serial bus system for sending multiple frames of unique data

1998-03-13

2000-07-25

Auve, Glenn A.

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710 30, G06F 1300

Patent

active

060947004

ABSTRACT:
A computer system includes an I/O controller and a bridge logic device which transmit status data via a serial bus. The I/O controller comprises an embedded controller, a memory device, and a serial bus interface including a transceiver, a transmit register, and a receiver register. The bridge logic also includes a serial bus interface with a transceiver, a transmit register, and a receiver register. Data is transmitted from the transmit register of one device to the receive register of the other device. Although the serial bus protocol limits data transfers to eight-bit segments, the I/O controller and bridge logic transmit up to twenty-four different variables by encoding each transmitted byte into a data frame that includes a two-bit frame identifier and a six-bit data field. Further, one of the data frames transmitted by the I/O controller includes an acknowledge bit to indicate when a previous frame has been received from the bridge logic. The bridge logic only transmits new data if the I/O controller toggles the acknowledge bit and transmits the frame containing the toggled acknowledge bit to the bridge logic. The acknowledge bit prevents the South Bridge from overwriting previously transmitted data that has not yet been read from the receive register in the I/O controller.

REFERENCES:
patent: 4712176 (1987-12-01), Fredericks et al.
patent: 5299313 (1994-03-01), Petersen et al.
patent: 5434872 (1995-07-01), Petersen et al.
patent: 5748911 (1998-05-01), Maguire et al.
patent: 5748923 (1998-05-01), Eitrich

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