Serial ATA port addressing

Details Serial ATA port addressing Serial ATA port addressing

2011-06-28

2011-06-28

Tsai, Henry W (Department: 2184)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output expansion

C370S447000

Reexamination Certificate

active

07970953

ABSTRACT:
In one aspect, a shared transport layer frame information structure (FIS) generation logic may generate FISes for each of a plurality of SATA ports. In a further aspect, a port addressing logic, in communication with the shared transport layer FIS generation logic, may select one of the SATA ports for each of the FISes.

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