Serial accessible semiconductor memory device

Details Serial accessible semiconductor memory device Serial accessible semiconductor memory device

1991-09-04

1993-07-20

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Simultaneous operations

36518905, 36523005, 36523008, 365233, G11C 1300

Patent

active

052299651

ABSTRACT:
The semiconductor memory device includes a serial memory cell array and an input-output circuit. The input-output circuit includes first and second latch circuits, first and second transfer circuits and an output circuit. The first transfer circuit transfers the information read from the serial memory cell array to the first latch circuit. The second transfer circuit transfers the information from the first latch circuit 103 to the second latch circuit 105. The output circuit externally supplies as output the information held in the second latch circuit. A clock generator supplies a clock signal to the first and the second transfer circuits and the output circuit so that the output operation by the output circuit may be effected, and then the transfer operation by the first transfer circuit may be effected after the transfer by the second transfer circuit has been effected.

REFERENCES:
patent: 5138579 (1992-08-01), Tatsumi et al.

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