Serial access memory device

Static information storage and retrieval – Read/write circuit – Serial read/write

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Details

36518901, 36523001, 36523006, 36523008, 365233, 365239, 365240, G11C 700, G11C 1300

Patent

active

055263160

ABSTRACT:
The serial access memory device provided has a first data terminal and a memory cell array having a plurality of address locations. The serial access memory device comprises a shift register and an address decode circuit. The shift register, responsive to an address clock signal, stores a first address value of a serial access memory operation. The shift register has an input terminal coupled to the first data terminal. The address decode circuit serially accesses the plurality of address locations of the memory cell array, responsive to an access control signal, the first address value, the address clock signal and the clock signal.

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patent: 4903242 (1990-02-01), Hamaguchi et al.
patent: 5198999 (1993-03-01), Abe et al.
patent: 5265049 (1993-11-01), Takasugi

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