Separating device response signals from composite signals

Details Separating device response signals from composite signals Separating device response signals from composite signals

2000-08-15

2003-05-13

Le, N. (Department: 2858)

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

C324S765010, C714S724000

Reexamination Certificate

active

06563298

ABSTRACT:

FIELD OF INVENTION
The present invention relates to the field of signal analysis, and more particularly, to identifying signals received from a device under test in an automatic test equipment (ATE) system.
BACKGROUND OF THE INVENTION
Integrated circuits (ICs), after being fabricated, are typically tested on ATE systems before being shipped to customers. Devices not passing certain tests are typically discarded and not shipped. The ATE can also be used to simply learn the characteristics of a particular device under test (DUT). One type of ATE system includes a test head with a socket to hold the DUT.
FIG. 1
illustrates a conventional ATE circuit coupled to a DUT circuit through a transmission path. The ATE circuit includes test driver
7
and receiver
20
. Circuitry identical to driver and receiver circuitry
1
is included for each pin of DUT
4
plugged into socket
6
. Driver and receiver circuitry
1
is used to transfer signals between the rest of the ATE and pin
8
of DUT
4
.
Circuitry
1
includes a driver
7
for sending test signals to pin
8
of DUT
4
over transmission path
5
. The ATE receiver
20
is typically one or more comparators with programmable reference levels. For example, ATE receiver
20
typically includes a valid logic low comparator
3
and a valid logic high comparator
2
coupled to path
5
for receiving signals from DUT
4
. Comparator
2
is coupled to a reference high voltage, also referred to as a preset high voltage. Comparator
3
is coupled to a reference low voltage, also referred to as a preset low voltage. Comparators
2
and
3
allow the ATE to sense whether pin
8
of DUT
4
is providing a valid logic high and a valid logic low signal, respectively.
Transmission path
5
acts like a bidirectional transmission line with a characteristic impedance Zo. The ATE driver typically has an output impedance that matches the impedance of the transmission line
5
that is used to connect the DUT and the ATE circuit.
The DUT
4
includes a receiver (not shown) to receive the test signals, and a driver (not shown) to send back response signals to the ATE in response to the test signals sent from the ATE to the DUT. The DUT driver typically has an output impedance that varies as a function of process variations and, for high-speed devices, is usually lower than the impedance of the tester circuit. Thus, driver and receiver circuitry
1
is used by the ATE to send and receive signals from DUT
4
.
The problem with testing high frequency ICs using conventional ATE in electronics is that the response signal that the DUT sends down the transmission path to the ATE does not arrive at the ATE before the ATE launches the next test signal for the DUT to receive. Because of this, the signal at the ATE is a composite of the ATE driver test signal and the DUT response signal, as shown in FIG.
2
. Conventional ATEs cannot identify the response signal that is needed to evaluate the DUT, because the response signal is lost in the composite signal.
FIG. 2
shows example waveforms from a conventional ATE having a transmission line with a 2.5 nano-second (nS) transmission length. The signals have 1 nS positive and negative pulse widths. The DUT is sending response signals
210
and
230
in the first and third cycles, and the ATE is driving test signals
220
and
240
in the second and fourth cycles. The test signals
220
and
240
sent by the ATE take 2.5 nS to travel the length of the transmission path and reach the DUT. Similarly, the response signals
210
and
230
from the DUT arrive at the ATE 2.5 nS after they leave the DUT. Thus, test signal
220
received by the DUT is test signal
221
sent by the ATE and time-shifted by 2.5 nS. Similarly, the response signal
231
received by the ATE is signal
230
sent by the DUT shifted by 2.5 nS.
These opposing time shifts mean that tfie-DUT response signal can be received at the same time that a test signal is being sent from the ATE driver. When these signals overlap, they add together to create a composite signal
250
at the ATE receiver
20
as shown in FIG.
2
. The composite signal which is a sum of signal
210
and signal
240
, bears little resemblance to the response signal sent from the DUT pin
8
.
In this example, the ATE driver
7
and the DUT driver (not shown) are left on at all times, and they both have an output impedance that matches the impedance of the transmission line. In this case, the transmission line
5
is always terminated so there are no reflections. However, the problem caused by overlapping signals becomes exacerbated when the output impedance of a DUT driver does not match the impedance of the transmission line, as shown in FIG.
3
.
Typically, a DUT driver turns off (goes to a high impedance state) to avoid driver contention when the ATE is driving. Therefore, when the test signal reaches the DUT, the test signal is reflected back over the transmission line to the ATE.
FIG. 3
shows example of waveforms including reflected test signals from a conventional ATE coupled to a DUT having a lower impedance than the transmission line. Because the test signal
320
that the ATE generates is not terminated by the DUT, the test signal
322
reflects back down the transmission path and is received by the ATE receiver 2.5 nS later. In this case, the ATE receiver
20
receives a composite signal, along with signals
320
,
340
and reflected signals
322
and
342
. Conventional ATE systems cannot separate the response signal from the composite signal.
The ideal way to solve the problem caused by a composite signal is to design an ATE system with a transmission path that has an electrical length shorter than one half of the response time of the DUT. DUT response times are already at 1 nS and are expected to be much faster. However, designing ATE test systems with transmission paths less than 500 pico-seconds (pS) for a large number of DUT pins has proven to be impractical. Conventional ATE systems use transmission lines that have transmissions lengths greater than or equal to 2 nS.
As a result, the most common method of testing a DUT with a fast response time is to test the DUT at a lower frequency, then assume that the DUT operates correctly at higher frequencies. However, this method of testing at lower frequencies does not necessarily detect all DUT process errors.
Another conventional way to work around the problem of a composite signal is to use a technique known as “fly-by”. This technique uses separate drive and receive transmission paths between the ATE and the DUT. Both paths are terminated with the characteristic impedance of the transmission line (typically 50 Ohms). The signal at the ATE receiver is the same as the signal on the DUT pin except that it is time delayed.
The main disadvantage of the “fly-by” technique is that more test resources are required. There are usually two ATE circuits and two transmission paths required for each DUT pin that requires high-speed input/output (I/O) testing. A second disadvantage of this technique is that the DUT must drive two transmission lines in parallel. This requires the DUT's output circuitry to drive enough current to do this even though the DUT may not be required to drive that amount of current in the intended final application.
It is also possible, in limited cases, to get around the problem of a composite signal by expecting a DUT to have a low enough output impedance to overdrive the ATE circuit. The ATE circuit can then determine the logic state of the DUT driver within a narrow band of compare logic levels.
However, the exact time that the DUT response signal transitions from one logic state to the other can be influenced by the ATE test signal. This influence can be on the same order of magnitude as the transition time of the ATE driver, which is several hundred pico-seconds on conventional ATE testers. As a result, this influence causes timing uncertainty that is greater than the specified timing accuracy of many high frequency DUTs.
SUMMARY OF THE INVENTION
An apparatus to receive a response signal from a device

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