Separate voltage driving method and apparatus for plasma...

Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device

Reexamination Certificate

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Details

C315S169100, C345S060000, C345S211000

Reexamination Certificate

active

06281635

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method and apparatus for separately driving a voltage in a plasma display panel, and more particularly to a separate voltage driving method and apparatus for a plasma display panel wherein abnormal brightness caused by a characteristic deviation of the panel is not only restrained, but also a damage of a switching device caused by an overcurrent is prevented. Also, the present invention is directed to a separate voltage driving method and apparatus for a plasma display panel wherein a sustaining voltage, a writing voltage and an erasing voltage are separated and adjusted in accordance with a characteristic deviation of the panel.
2. Description of the Related Art
Generally, a plasma display panel (PDP) radiates a fluorescent body by an ultraviolet with a wavelength of 147 nm generated during a discharge of He+Xe or Ne+Xe gas to thereby display a picture including characters and graphics. Such a PDP is easy to be made into a thin film and large-dimension type. Moreover, the PDP provides a very improved picture quality owing to a recent technical development. The PDP is largely classified into a direct current (DC) driving system and an alternating current (AC) driving system.
Since the AC-type PDP has an advantage of a low voltage driving and a long life in comparison to the DC-type PDP, it will be highlighted as the future display device. The AC-type PDP allows an alternating voltage signal to be applied between electrodes having dielectric layer therebetween to generate a discharge every half-period of the signal, thereby displaying a picture. Since such an AC-type PDP uses a dielectric material that allows a wall charge to be accumulated on the surface thereof upon discharge, it exerts a memory effect.
Referring to FIG.
1
and
FIG. 2
, the AC-type PDP includes a front substrate
1
provided with a sustaining electrode pair
10
, and a rear substrate
2
provided with address electrodes
4
. The front substrate
1
and the rear substrate
2
are spaced in parallel to each other with having barrier ribs
3
therebetween. A mixture gas, such as Ne—Xe or He—Xe, etc., is injected into a discharge space defined by the front substrate
1
, the rear substrate
2
and the barrier ribs
3
. These sustaining electrodes
10
make a pair by two within a single of plasma discharge channel. Any one electrode of the sustaining electrode pair
10
is used as a scanning/sustaining electrode that responds to a scanning pulse applied in an address interval to cause an opposite discharge along with the address electrode
4
while responding to a sustaining pulse applied in a sustaining interval to cause a surface discharge with the adjacent sustaining electrodes
10
. Also, the sustaining electrode
10
adjacent to the sustaining electrode
10
used as the scanning/sustaining electrode is used as a common sustaining electrode to which a sustaining pulse is applied commonly. On the front substrate
1
provided with the sustaining electrodes
10
, a dielectric layer
8
and a protective layer
9
are disposed. The dielectric layer
8
is responsible for limiting a plasma discharge current as well as accumulating a wall charge during the discharge. The protective film
9
prevents a damage of the dielectric layer
8
caused by the sputtering generated during the plasma discharge and improves the emission efficiency of secondary electrons. This protective film
9
is usually made from MgO. The rear substrate
2
is provided with a dielectric thick film
6
covering the address electrodes
4
. The barrier ribs
3
for dividing the discharge space are extended perpendicularly at the rear substrate
2
. On the surfaces of the rear substrate
2
and the barrier ribs
3
, a fluorescent material
5
excited by a vacuum ultraviolet lay to generate a visible light is provided.
As shown in
FIG. 3
, the PDP
21
has mxn discharge pixel cells
11
arranged in a matrix pattern. At each of the discharge pixel cells
11
, scanning/sustaining electrode lines Y
1
to Ym, hereinafter referred to as “Y electrode lines”, and common sustaining electrode lines Z
1
to Zm, hereinafter referred to as “Z electrode lines”, and address electrode lines X
1
to Xn, hereinafter referred to as “X electrode lines” are crossed with respect to each other. The Y electrode lines Y
1
to Ym and the Z electrode lines Z
1
to Zm consist of the sustaining electrode
10
making a pair. The X electrode lines X
1
to Xn consist of the address electrode
4
.
FIG. 3
is a schematic view of a PDP driver shown in FIG.
1
. In
FIG. 3
, the PDP driver includes a scanning/sustaining driver
22
for driving the Y electrode lines Y
1
to Ym, a common sustaining driver
24
for driving the Z electrode lines Z
1
to Zm, and first and second address drivers
26
A and
26
B for driving the X electrode lines X
1
to Xn. The scanning/sustaining driver
22
is connected to the Y electrode lines Y
1
to Ym to thereby select a scanning line and cause a sustaining discharge at the selected scanning line. The common sustaining driver
24
is commonly connected to the Z electrode lines Z
1
to Zm to apply sustaining pulses with same waveform to all the Z electrode lines Z
1
to Zm, thereby causing the sustaining discharge. The first address driver
26
A supplies odd-numbered X electrode lines X
1
, X
3
, . . . , Xn-
3
, Xn-
1
with a video data, whereas the second address driver
26
B supplies even-numbered X electrode lines X
2
, X
4
, . . . , Xn-
2
, Xn with a video data.
In such an AC-type PDP, one frame consists of a number of sub-fields so as to realize gray levels by a combination of the sub-fields. For instance, when it is intended to realize 256 gray levels, one frame interval is time-divided into 8 sub-fields. Further, each of the 8 sub-fields is again divided into a reset interval, an address interval and a sustaining interval. The entire field is initialized in the reset interval. The cells on which a data is to be displayed are selected by a writing discharge in the address interval. The selected cells sustain the discharge in the sustaining interval. The sustaining interval is lengthened by an interval corresponding to 2
n
depending on a weighting value of each sub-field. In other words, the sustaining interval involved in each of first to eighth sub-fields increases at a ratio of 2
0
, 2
1
, 2
3
, 2
4
, 2
5
, 2
6
and 2
7
. To this end, the number of sustaining pulses generated in the sustaining interval also increases into 2
0
, 2
1
, 2
3
, 2
4
, 2
5
, 2
6
and 2
7
. depending on the sub-fields. The brightness and the chrominance of a displayed image are determined in accordance with a combination of the sub-fields.
FIG. 4
is a detailed circuit diagram of the scanning/sustaining driver shown in FIG.
3
. In
FIG. 4
, the scanning/sustaining driver
22
includes a voltage input/output stage
22
a
, a writing/erasure scanning voltage generator
22
b
, a sustaining voltage generator
22
c
and a voltage recovery stage
22
d
so as to apply a driving pulse to any one of m Y electrode lines Y
1
to Ym. The voltage input/output stage
22
a
consists of first and second switching devices Q
1
and Q
2
connected, in series, to each other, and diodes D
1
and D
2
connected, in parallel, to the first and second switching devices Q
1
and Q
2
, respectively. The first and second switching devices Q
1
and Q
2
are selectively switched in response to a control signal applied from a controller (not shown) . Thus, the first and second switching devices Q
1
and Q
2
applies a writing/erasure scanning pulse voltage Vp and a sustaining voltage VH to a pixel cell
11
of the panel
20
. The sustaining voltage generator
22
c
consists of third and fourth switching devices Q
3
and Q
4
connected, in series, between a sustaining voltage (VH) supply terminal and a ground terminal GND, and fifth and sixth switching devices Q
5
and Q
6
and diodes D
3
and D
4
connected to a middle voltage VM having a half level of the sustaining voltage VH to make a closed loop. The

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