Separate victim buffer read and release control

Details Separate victim buffer read and release control Separate victim buffer read and release control

1997-10-24

2000-08-08

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

712217, G06F 1212

Patent

active

061015814

ABSTRACT:
In accordance with the present invention, a method and apparatus is provided for maintaining the coherency of victim data from a time when the data is stored in a victim data buffer until a time when the data is written into a main memory. Alternatively, the coherency of the victim data is preserved until a determination is made that pending probe messages do not target the victim data. At that time the victim data buffer can be deallocated.
With both arrangements, a central processing unit can release a victim data buffer at a point in time other than when the data that is stored therein is read from the buffer. Thus, the central processor unit can perform the release or deallocation of the buffer when it is most efficient and when no further access to the data is required.

REFERENCES:
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patent: 5715428 (1998-02-01), Wang et al.
patent: 5752274 (1998-05-01), Garibay, Jr. et al.
patent: 5887152 (1999-03-01), Tran
patent: 5890217 (1999-03-01), Kabemoto et al.
patent: 5893153 (1999-04-01), Tzeng et al.
patent: 5900011 (1999-05-01), Saulsbury et al.

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