Separate configuration of I/O cells and logic core in a...

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Reexamination Certificate

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Reexamination Certificate

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08040152

ABSTRACT:
A programmable logic device (PLD) is provided that includes: a plurality of programmable logic blocks, the plurality of programmable logic blocks being associated with a first configuration data shift register operable to shift in configuration data for the plurality of programmable logic blocks; a plurality of input/output (I/O cells), each I/O cell associating with a corresponding set of I/O configuration memory cells; and a plurality of boundary scan cells corresponding to the plurality of I/O cells, each boundary scan being configurable to form a second data shift register for the I/O configuration memory cells.

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patent: 6842039 (2005-01-01), Guzman et al.
patent: 7112992 (2006-09-01), Guzman et al.
patent: 7375549 (2008-05-01), Tang et al.
patent: 7538574 (2009-05-01), Tang et al.

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