Static information storage and retrieval – Read/write circuit – Differential sensing
Patent
1997-04-10
1998-05-05
Yoo, Do Hyun
Static information storage and retrieval
Read/write circuit
Differential sensing
365184, 36518509, 36518907, 36523006, G11C 700
Patent
active
057485461
ABSTRACT:
Methods and apparatus for determining the state of a memory cell having more than two possible states are disclosed. For a first embodiment, the state of a flash cell having n states, where n is a power of 2, is determined by selectively comparing the threshold voltage V.sub.t of a selected memory cell to (n-1) reference voltages. For every two states, a single comparator is provided such that the total number of comparators is equal to the number of bits stored in the memory cell.
REFERENCES:
patent: 3142824 (1964-07-01), Hill
patent: 3505655 (1970-04-01), Nystrom
patent: 4181980 (1980-01-01), McCoy
patent: 4202044 (1980-05-01), Beilstein, Jr. et al.
patent: 4287570 (1981-09-01), Stark
patent: 4357685 (1982-11-01), Daniele et al.
patent: 4388702 (1983-06-01), Sheppard
patent: 4415992 (1983-11-01), Adlhoch
patent: 4460982 (1984-07-01), Gee et al.
patent: 4586163 (1986-04-01), Koike
patent: 4653023 (1987-03-01), Suzuki et al.
patent: 4701884 (1987-10-01), Aoki et al.
patent: 4771404 (1988-09-01), Mano et al.
patent: 4875188 (1989-10-01), Jungroth
patent: 4890259 (1989-12-01), Simko
patent: 4943948 (1990-07-01), Morton et al.
patent: 4989179 (1991-01-01), Simko
patent: 5012448 (1991-04-01), Matsuoka et al.
patent: 5034922 (1991-07-01), Burgess
patent: 5043940 (1991-08-01), Harari
patent: 5053990 (1991-10-01), Kreifels et al.
patent: 5095344 (1992-03-01), Harari
patent: 5126967 (1992-06-01), Simko
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5200920 (1993-04-01), Norman et al.
patent: 5218569 (1993-06-01), Banks
patent: 5222046 (1993-06-01), Kreifels et al.
patent: 5237535 (1993-08-01), Mielke et al.
patent: 5260901 (1993-11-01), Nagase et al.
patent: 5262984 (1993-11-01), Noguchi et al.
patent: 5283761 (1994-02-01), Gillingham
patent: 5287305 (1994-02-01), Yoshida
patent: 5289406 (1994-02-01), Uramoto et al.
patent: 5289412 (1994-02-01), Firary et al.
patent: 5293560 (1994-03-01), Harari
patent: 5297148 (1994-03-01), Harari et al.
patent: 5305273 (1994-04-01), Jinbo
patent: 5351210 (1994-09-01), Saito
patent: 5361343 (1994-11-01), Kosonocky et al.
patent: 5375097 (1994-12-01), Reddy et al.
patent: 5388064 (1995-02-01), Khan
patent: 5394359 (1995-02-01), Kowalski
patent: 5440505 (1995-08-01), Fazio et al.
patent: 5448712 (1995-09-01), Kynett et al.
patent: 5450363 (1995-09-01), Christopherson et al.
patent: 5463757 (1995-10-01), Fandrich et al.
patent: 5497354 (1996-03-01), Sweha et al.
patent: 5513333 (1996-04-01), Kynett et al.
patent: 5515317 (1996-05-01), Wells et al.
patent: 5537350 (1996-07-01), Larsen et al.
patent: 5539690 (1996-07-01), Talveja et al.
patent: 5566125 (1996-10-01), Fazio et al.
patent: 5594691 (1997-01-01), Bashir
Atwood Gregory
Bauer Mark E.
Fazio Albert
Frary Kevin W.
Javanifard Johnny
Intel Corporation
Yoo Do Hyun
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