Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2011-08-09
2011-08-09
Tran, Michael T (Department: 2827)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S205000
Reexamination Certificate
active
07995411
ABSTRACT:
According to one exemplary embodiment, a memory sensing and latching circuit includes a sensing circuit for evaluating bit lines in a memory array and providing a sensed output. The memory sensing and latching circuit further includes a latching circuit including a dynamic one-shot circuit driven by the sensed output, a sense amplifier enable signal, and a precharge clock. The latching circuit further includes a storage circuit for storing a one-shot output of the dynamic one-shot circuit, where the one-shot output corresponds to the sensed output. The one-shot output of the dynamic one-shot circuit is stored in the storage circuit during an evaluation of the sensed output. The evaluation of the sensed output is responsive to the sense amplifier enable signal.
REFERENCES:
patent: 5517462 (1996-05-01), Iwamoto et al.
Hoyer Gregg
Wilson James
Broadcom Corporation
Farjami & Farjami LLP
Tran Michael T
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