Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Patent
1991-07-23
1995-05-16
Lee, Benny
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
36518905, 365203, 365205, 365208, G11C 700, G11C 1100, H03K 524
Patent
active
054163714
ABSTRACT:
A dynamic random access memory (DRAM) of 2/3 VDD precharge scheme is disclosed. A latch driving circuit controls the voltage of the common node of a sense latch so as to limit the downward voltage swing of bitlines to 1/3 VDD, a low level restore voltage. The sense latch is coupled to a pair of I/O data lines through PMOS FET column switches. This invention provides high speed memory operation and reduces power consumption.
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T. Kirihata et al., "A 15-ns Experimental DRAM with a Limited-Bit-Line-Swing Sense Amplifier," IBM Research, Toyko Research Lab., IBM Japan, Ltd.
Katayama Yasunao
Kirihata Toshiaki
Scheuerlein Roy L.
Chadurjian Mark F.
International Business Machines - Corporation
Leas James M.
Lee Benny
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