Sense/restore circuit for dynamic random access memory

Static information storage and retrieval – Read/write circuit – Data refresh

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Details

365203, G11C 1300

Patent

active

044778864

ABSTRACT:
In a capacitive storage integrated circuit dynamic random access memory having a cross-coupled transistor sense amplifier coupled to a bit line wherein capacitive storage cells are coupled to the bit line through transistor transfer gates, means are provided for restoring charge on the capacitive storage cell by recharging the memory cells directly rather than through the bit lines. Specifically, each storage cell has one terminal coupled to one electrode terminal of the transistor transfer gate and its other terminal coupled to a switched voltage reference. The storage cell is not referenced to a fixed ground level.

REFERENCES:
patent: 3737879 (1973-06-01), Greene et al.

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