Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-09-25
2002-08-13
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S342000, C257S343000, C257S401000, C257S529000
Reexamination Certificate
active
06433386
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a power semiconductor device, and more particularly to a sense FET having additional sense pads.
2. Description of the Related Art
Power MOSFETs are used for applications such as switching mode power supplies, lamp ballasts, motor driving circuits, etc. They have simple driving circuits and relatively low time delays as switching devices or control devices for supplying power to loads.
A power MOSFET is typically composed of an array in which thousands to tens of thousands of switching cells are connected in parallel on one chip. The amount of load current passing through the power MOSFET is measured by a voltage drop in a fractional value power resistor which is in series with the load current path.
A problem is that these resistors consume too much power due to the high load current, which reduces the overall system efficiency. Also, fractional value power resistors cost more than common carbon resistors.
A sense FET that has been proposed recently is shown in FIG.
1
. The sense FET includes a main FET Qm and a sub FET Qs. The main FET and the sub FET are connected in parallel, but two sources are provided. Main source Sm of the main FET is grounded, while sense source Ss of the sub FET is connected to an external sense resistor Rs(ext), to thereby detect a voltage drop Vs of the sense resistor. The connection to Rs(ext) is external, accomplished via a pin of the sense FET package.
Each of Qm and Qs is made from a large number of cells. Since the main cells are structured identically to the sense cells, their current-voltage characteristics are identical. The number ratio n of the main cells over the sense cells has a value of hundreds or thousands.
The sub FET is designed to carry a predetermined percentage of the current carried by the main FET as follows. Current Id, supplied to a drain D of the sense FET is divided between a current Im going through main FET Qm and a current Is going through sub FET Qs. Since an on-resistance value of the MOSFET is inversely proportional to the number of cells in the FET, the on-resistance value of Qs is much higher than that of Qm. So, currents Im and Is have a ratio depending on number ratio n, and total drain current Id is expressed as follows:
Id
=
Is
+
Im
=
Is
+
n
·
Is
=
(
n
+
1
)
·
Is
Therefore Is is a very small fraction of Id; in other words, by far most of total drain current Id flows through Qm as Im. In addition, a voltage Vs appearing across sense resistor Rs(ext) is given by:
Vs
=
Rs
(
ext
)
·
Is
=
Rs
(
ext
)
·
Id
/
(
n
+
1
)
The above equation is solved for total drain current Id as follows:
Id=Vs
.(n+1)/
Rs
(ext)
Accordingly, total drain current Id can be estimated by measuring voltage drop Vs, and then using the known values of n, Rs(ext) in the above equation. This technique permits estimating the total current by using a sample current of only several mA, which consumes only a small amount of power, and thus permits the use of a common carbon resistor.
The current ratio (sense current ratio) Im/Is of the main FET and the sub FET is a very important test item for the sense FET. The ratio needs to be maintained at a designed level to measure the load current more exactly.
In general, the desired sense current ratio depends on the circuit that the sense FET is intended to be applied to. This means that a different number ratio n must be used in each case, and thus different numbers of sense cells for a given number of main cells. Accordingly, different applications require different designs of sense FETs, which prevents a manufacturing efficiency from being high.
Even worse, the sense current ratio may turn out to be different from what was originally designed for, depending on the material used for producing the sense FET. It may be different enough to where the sense FET is unusable for the intended application.
SUMMARY OF THE INVENTION
To solve the above problems, it is an object of the present invention to provide a sense FET capable of providing a number of available sense current ratios, any one of which can be selectable after manufacture. It is also an object of the invention to provide a method for manufacturing such a FET.
Accordingly, to achieve the above object, a sense FET made according to the invention includes a main cell array of MOSFET cells connected in parallel, and a main pad connected to the sources of the main cells. The sense FET further includes a plurality of unit sense cells arranged in arrays, and also optionally in groups corresponding to portions of arrays. The sense cells have drains and gates connected respectively to the drains and gates of the cells of the main cell array. Their structure is preferably identical to that of the cells of the main cell array, so that they share the same current-voltage characteristics.
The sense FET further includes a plurality of sense pads that are electrically insulated from each other as well as from the main pad. Each sense pad is connected to the sources of the unit sense cells of either a complete sense cell array, or of a group corresponding to portions of an array. When a sense pad is effectively connected to a sense resistor, the unit cells that it is connected to are used as sense cells.
In the first embodiment of the invention, different sense pads or combinations of sense pads are effectively connected to the sense resistor by a reconfigurable wire bonding process. For every such configuration, a different number of unit cells is effectively chosen to act as sense cells, and therefore a different sense current ratio is effectuated for the device.
In the second embodiment, one of the sense pads (whose unit cells are always to be used as sense cells) is connected directly to the sense resistor. Other sense pads can be connected to that pad by a metal thin film fuse, that can be cut later with an overcurrent to effectuate a different sense current ratio.
In the third embodiment the unit cells connected to unused sense pads are used as main cells by the main cell array. This is accomplished by having all sense pads initially connected to the main pad with fuses. Then, for only the pads whose unit cells will be used as sense cells, the fuses are cut, and wire bonding effectively connects them to the sense resistor.
Accordingly, a sense FET made according to the present invention makes available a number of possible sense current ratios. The invention permits selecting one of the available ratios by a selection of a proper number of unit cells to act as sense sells. The unit cells are selected by selecting an appropriate combination of sense pads with the processes of cutting fuses and wire bonding.
According to a method of the invention, a sense FET is formed that has a selectable sense current ratio. The method has the steps of forming a main cell array with a plurality of MOSFET cells connected in parallel, and forming a plurality of unit sense cells. The unit sense cells have drains and gates connected to the drains and gates respectively of the main MOSFET cells. The unit sense cells are arranged in at least two groups.
A main pad is formed that is electrically connected to the sources of the MOSFET cells. A plurality of sense pads is further formed, each electrically connected to the sources of the unit sense cells of a single group.
The sense pads are connected either to the sense resistor or to the main pad. They are so connected either by thin film metal fuses or by subsequent wire bonding. An initial connection scheme can be reconfigured by changing the wire bonding, or by electrically cutting one or more fuses with an overcurrent.
The sense resistor is also electrically connected to the main pad, and then the sense current ratio is measured. The measurement can reveal a need for reconfiguring the connection scheme.
The invention permits a single initial design for many possible sense current ratios, which increases a design efficiency. This also permits manufacturing a single device for many
Jun Kwang-yeon
Lee Ki-hyun
Yun Chong-man
Crane Sara
Marger & Johnson & McCollom, P.C.
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