Sense amplifier with reference cell circuit

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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Details

C365S205000, C365S208000, C365S210130, C327S056000

Reexamination Certificate

active

06590820

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a sense amplifier used in a semiconductor memory circuit, and more particularly, to a sense amplifier having a testing capability to predict memory cell operability under extreme temperature conditions.
2. Description of Related Art
A sense amplifier conventionally used for a semiconductor memory is provided with a reference cell for a reference amplifier.
Referring to
FIG. 5
, a conventional sense amplifier is provided with a memory cell amplifier
550
that senses data in a memory cell
560
and amplifies the data, a reference cell
530
that outputs voltages corresponding to the operation of the memory cell
560
and a differential circuit
540
that compares the output of the memory cell amplifier
550
and the output of the reference amplifier
520
. The memory cell amplifier
550
is coupled to a 1-kbit or higher memory cell.
Comparing the output of the amplifier
550
and output of reference amplifier
520
permits rejecting a defective memory cell, in a testing mode of the device.
However, recently, because of increased variation in the threshold Vt of a transistor due to the miniaturization of a cell and temperature-dependency, a memory cell which is operable at room temperature may become defective at the time of high temperature or low temperature.
Therefore, there is a problem that, as a cell that is defective only at high temperature or low temperature cannot be identified by testing at room temperature, defective memory cells maybe included in a device.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a sense amplifier that rejects at room temperature, a memory cell that would become defective at high temperature or low temperature.
A first sense amplifier according to the present invention includes: a plurality of memory cells; a first amplifier connected to each of the memory cells and generating an output voltage in response to an active memory cell; a reference cell generating a reference signal; a second amplifier connected to the reference cell circuit, generating one of first and second reference voltages in response to the reference signal; and a differential circuit connected to the first and second amplifiers and comparing the output voltage of the first amplifier with one of the first and second reference voltages, wherein the first reference voltage is a first threshold to determine whether the output voltage is high or low.
A second sense amplifier according to the present invention includes: a plurality of memory cells; a first amplifier connected to each of the memory cells; a reference cell circuit generating a reference signal; a second amplifier connected to the reference cell circuit and generating a reference voltage in response to the reference signal; and a comparing interface having first and second differential circuits, each of the first and second differential circuits comparing an output voltage of the first amplifier with the reference voltage, the first differential circuit having a first threshold and determining whether the output voltage is high or low, and the second differential circuit having a second threshold which is different from the first threshold.
These and other objects of the present invention will be apparent to those of skill in the art from the appended claims when read in light of the following specification and accompanying figures.


REFERENCES:
patent: 5982662 (1999-11-01), Kobayashi et al.
patent: 6016276 (2000-01-01), Fuji
patent: 6185143 (2001-02-01), Perner et al.
patent: 6246608 (2001-06-01), Odani

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