Sense amplifier with reduced detection error

Details Sense amplifier with reduced detection error Sense amplifier with reduced detection error

2005-11-22

2005-11-22

Ho, Hoai (Department: 2827)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S194000, C365S203000

Reexamination Certificate

active

06967883

ABSTRACT:
This invention provides a type of sense amplifier, a type of bit line circuit, a type of storage device, and a method for amplifying a read signal characterized by the fact that it has a small detection error of the read signal and has low power consumption. With bit lines (BL, BLZ) and input terminals (SA, SAZ) of the amplifier connected to each other by means of a CMOS switch circuit, as control signal ENN becomes high level, amplification of the read signal in the amplifier starts and, at the same time, the amplified signal is held. After a time delay determined by delay circuit U1from the start of amplification of the read signal, control signal GEN1and control signal GEN2output from said delay circuit U1are changed, and connection between the bit line and amplifier is cut off. Consequently, while the small potential difference at the start of amplification is kept by the current from the bit line, the amplification operation is carried out to a certain degree, and then the bit line is cut off from the amplifier. Consequently, a detection error in the read signal can hardly take place.

REFERENCES:
patent: 5539691 (1996-07-01), Kozaru et al.
patent: 5724292 (1998-03-01), Wada

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