Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-02-28
2010-11-30
Le, Vu A (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S196000, C365S185220
Reexamination Certificate
active
07843738
ABSTRACT:
A reading circuit for a semiconductor memory, comprising: a circuital branch adapted to be electrically coupled to a bit line which is connected to a memory cell to be read; an evaluation circuit adapted to sense a cell electric current flowing through the bit line during a sensing phase of a reading operation of the data stored into the memory cell, the evaluation circuit comprising a negative feedback control loop adapted to control the potential of the bit line during the sensing phase, the control loop comprising a differential amplifier having an inverting input terminal operatively connected to the bit line, a non-inverting input terminal fed by a first reference potential, and a feedback circuital path connected between an output of the differential amplifier and the inverting input, wherein the feedback circuital path is adapted to conduct a measure current corresponding to the cell electric current, and comprises current/voltage conversion means for converting the measure current into a corresponding voltage. The conversion means of the feedback circuital path comprises at least one first transistor arranged to conduct the measure current, and biasing means adapted to bias the at least one first transistor so as to emulate the behavior of a resistor.
REFERENCES:
patent: 6625057 (2003-09-01), Iwata
patent: 2004/0228162 (2004-11-01), Pasotti et al.
patent: 2005/0063236 (2005-03-01), Pagliato et al.
patent: 2006/0062042 (2006-03-01), Karlsson et al.
patent: 1467377 (2004-10-01), None
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Giambartino Antonio
La Placa Michele
Martines Ignazio
Graybeal Jackson LLP
Jablonski Kevin D.
Jorgenson Lisa K.
Le Vu A
STMicroelectronics S.r.l.
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