Sense amplifier for MOS static memory array

Static information storage and retrieval – Read/write circuit – Differential sensing

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307530, G11C 700

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active

044609850

ABSTRACT:
A bit line sense amplifier circuit for an Electrically Alterable Read Only Memory. A reference voltage is produced which tracks a power supply voltage, remaining a threshold voltage away therefrom at all times. The reference voltage is fed to one input terminal of a differential amplifier comparator, the other input terminal of which is connected to the bit line. A voltage clamping circuit is also provided on the bit line which prevents excursions of the bit line voltage to a point just below that at which the switch point occurs. A pull-up circuit, which pulls the bit line toward the power supply voltage, supplies an increasing drive capability as the bit line voltage moves toward the switching point and a lesser drive capacity thereafter to prevent excessive excursions of the bit line voltage. A buffer level shifting output circuit converts the output of the differential amplifier to logic levels.

REFERENCES:
patent: 4162416 (1979-07-01), Beecham et al.
patent: 4397003 (1983-08-01), Wilson et al.
IBM J. Res. Develop., vol. 24, No. 3, May 1980, K. Gray, "Cross-Coupled Charge-Transfer Sense Amplifier and Latch Sense . . . ".
IEEE Journal of Solid-State Circuits, vol. SC-15, No. 3, Jun. 1980, T. Hagiwara et al, "A 16 kbit Electrically Erasable PROM . . . ".
IEEE Journal of Solid-State Circuits, vol. SC-15, No. 3, Jun. 1980, B. Giebel, "An iK EEPROM Using the SIMOS Storage Cell".
IEEE Jour. of Solid-State Cir., vol. SC-12, No. 5, Oct. 1977, R. Muller et al, "An 8192-bit Electrically Alterable ROM . . . ".
IEEE Trans. on Elec. Devices, vol. ED-28, No. 9, Sep. 1981, D. KiMaria et al, "Dual-Electron-Injector-Structure Electrically . . . ".

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