Sense amplifier for low read-voltage memory cells

Static information storage and retrieval – Read/write circuit – Differential sensing

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Details

365205, 36518907, 365210, G11C 702

Patent

active

058727396

ABSTRACT:
A sense amplifier for comparing the resistance of a reference cell connected to a reference bit line to the resistance of a data cell connected to a data bit line. The amplifier includes a first terminal for connecting the sense amplifier to the reference bit line and a second terminal for connecting the sense amplifier to the data bit line. A reference current to voltage amplifier is connected to the first terminal for generating a reference voltage related to the current flowing through the reference bit line and for maintaining the first terminal at a reference potential when the current flowing through the reference bit line is less than a first current value. A data current to voltage amplifier is connected to the second terminal for generating a data voltage related to the current flowing through the data bit line and for maintaining the second terminal at the reference potential when the current flowing through the data bit line is less than a second current value. A comparitor compares the reference and data voltages. The data current to voltage amplifier includes an operational amplifier for measuring the difference between a potential on a first conductor and the potential on the data bit line. The operational amplifier allows the reference potential to be set at a lower voltage than is available in prior art designs. The invention utilizes a capacitive dividing scheme for pre-charging the bit lines prior to connecting the sense amplifier.

REFERENCES:
patent: 5317218 (1994-05-01), Liu
patent: 5410504 (1995-04-01), Ward
patent: 5469382 (1995-11-01), Yero
patent: 5487045 (1996-01-01), Trodden
patent: 5539694 (1996-07-01), Rouy

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