Sense amplifier for a memory device

Details Sense amplifier for a memory device Sense amplifier for a memory device

1990-01-16

1992-06-30

Bowler, Alyssa H.

Static information storage and retrieval

Read/write circuit

Differential sensing

365208, 36518901, 36518906, 307530, G11C 700, G11C 11407

Patent

active

051269740

ABSTRACT:
A MOS transistor sense amplifier employs cross coupled positive feedback for the load circuit of a differential amplifier with an equalizing switch at the amplifier output, and preferably also at the input. This basis amplifier circuit may be repeated in stages. When stages are employed, it is desirable that the first stage employs current mirror loading of the differential amplifier to reduce the data delay. Data delay is further reduced by providing strong amplification during the sense portion of the read cycle with a preamplifier, which preamplifier has its amplification reduced, preferably to unity by being turned off, when the sense portion of the cycle is finished, and most preferably when the input and output data lines are directly connected independently of the preamplifier, so that the preamplifier may be completely turned off to lower power consumption.

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